Implementing A Unique Chip Id On A Reconfigurable Polymorphic Circuit

Lukas Sekanina, Richard Ruzicka, Zdenek Vasicek, Vaclav Simek, Petr Hanacek

Abstract


A unique unclonable chip ID has been implemented using various platforms in the recent years. In this paper, we investigate the use of polymorphic gates as a new mechanism for implementing a unique chip ID in systems already containing some polymorphic gates. The proposed solution exploits the fact that switching time of polymorphic gates (controlled by Vdd) is slightly different even for neighboring gates on the same die because of fabrication variations. We applied a partial reconfiguration in order to generate 48-bit IDs on the reconfigurable polymorphic REPOMO32 chip that we have developed in our previous research. We achieved 94.44% stable bits which is reasonably close to existing approaches.

DOI: http://dx.doi.org/10.5755/j01.itc.42.1.925


Keywords


Unclonable ID; Polymorphic Gate; Process Variation; Reconfigurable Circuit

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Print ISSN: 1392-124X 
Online ISSN: 2335-884X